Recent electronic devices tend to be lighter, thinner and smaller, and parts in which emphasis is placed on design and that make frequent use of curved surfaces for external appearance have begun to appear on the market. Further, parts with a curved-surface design have been announced in the form of various electronic devices as concept models.
In order to realize lighter, thinner and smaller models the external appearance of which presents a curved surface, it is preferred that internal parts be mounted even on the curved portions, a goal which is not feasible with the packaging of the conventional art. Preferably, the mounting substrate is provided with a curved surface to assure space.
Conventional art examples of a semiconductor package on which a semiconductor device has been mounted will be described.
FIG. 21 is a sectional view schematically illustrating the structure of a semiconductor package according to a first example of the conventional art. The first example of the conventional art is an ordinary ball grid array electronic part (referred to as a “BGA-type electronic part) according to the conventional art, as illustrated in Patent Document 1. As shown in FIG. 21, a conventional BGA-type electronic part 100 includes a planar base substrate 101; an accommodating portion 102 comprising a mold formed on one face of the base substrate 101; an IC chip 103, which is a semiconductor element placed in the accommodating portion 102; and solder balls 104 of radius r provided on the other face of the base substrate 101 and connected by wires or the like to terminals of the IC chip 103. The connection between the BGA-type electronic part 100 and a mounting substrate (not shown) is achieved by placing the BGA-type electronic part 100 on the mounting substrate, then applying heat through a reflow oven and melting the solder balls 104 to connect the BGA-type electronic part 100 to the mounting substrate.
FIG. 22 is a sectional view schematically illustrating the structure of a semiconductor package according to a second example of the conventional art. The second example of the conventional art is similar to a conventional chip-size package described in Patent Document 2. In a semiconductor package 200 shown in FIG. 22, the electrode (not shown) of a semiconductor chip 201 is connected by a conductor 203 to an electrode pad 202c of an interposer 202 obtained by building up insulating films 202b on both sides of a wiring pattern 202a. Thereafter, an insulating resin 204 is injected into the space between the interposer 202 and semiconductor chip 201, the interposer 202 is bent from the side surface of the semiconductor chip 201 to the back surface (the surface on the side opposite that on which the electrode pad is disposed), and the insulating resin 204 is applied to the area in which the semiconductor chip 201 is exposed at the back side of the chip 201, thereby adhering the interposer 202 to the semiconductor chip 201. Solder bumps 205 are formed on electrode pads 202d of the interposer 202. In this semiconductor chip 201, the interposer 202 and semiconductor chip 201 are adhered by the insulating resin 204, which performs the role of an adhesive.
[Patent Document 1] Japanese Patent Kokai Publication No. JP-A-9-167811
[Patent Document 2] Japanese Patent Kokai Publication No. JP-A-8-335663